Chip Design & Architecture

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ADA Center holds 2020 symposium with virtual attendance, highlighting new research into computer design

The symposium highlighted new developments in computer architecture, and included a session on how the center's research can contribute to limiting the impact of pandemics.|Short Read
Mobile phones around cell tower Isolated on digital background, mobile transmitter, Internet Communication Concept. 3d rendered

“Ultra low-power receivers for IoT applications” wins Outstanding Invited Paper

Prof. David Wentzloff’s paper examining the trends and techniques to achieve ultra-low power receivers was honored by the IEEE Custom Integrated Circuits Conference|Short Read
Prof. Reetuparna Das

Das recognized as outstanding researcher for work on computational caches

Computational caches are an emerging technology based on the use of a processors cache space to perform computations.|Short Read

New student tool gets chips from lab to fab faster than ever

The open-source system cuts a key step in chip testing down from days or weeks to a couple hours, on average.|Medium Read
Scientist in the Lurie Nanofabrication Facility uses a computer inside of a clean room

Beyond Moore’s Law: taking transistor arrays into the third dimension

Thin film transistors stacked on top of a state-of-the-art silicon chip could help shrink electronics while improving performance.|Medium Read

Researchers design new solution to widespread side-channel attacks

The proposal provides a chip-level safeguard against sensitive data being transmitted after it’s accessed.|Medium Read
The Summit Supercomputer

Rewriting the rules for supercomputers

Machine learning will teach the world’s fastest machines to work smarter, not harder|Medium Read

25-year paper award for power-saving approach to high-performance computing

Mudge’s paper examined the power-saving needs of high-performance computing.|Short Read
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Three CSE papers chosen as IEEE Micro Top Picks

Top Picks is an annual special edition of IEEE Micro magazine that acknowledges the 10-12 most significant research papers.|Short Read

SLAM-ming good hardware for drone navigation

Researchers built the first visual SLAM processor on a single chip that provides highly accurate, low-power, and real-time results.|Short Read
MORPHEUS blocks potential attacks by encrypting and randomly reshuffling key bits of its own code and data twenty times per second. Getty Images.

New chip stops hacks before they start

MORPHEUS can encrypt and reshuffle code thousands of times faster than human and electronic hackers.|Medium Read
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U-M startup raises $6 million in venture funding

Movellus is a U-M startup founded by alumni Dr. Mo Faisal (now CEO) and Dr. Jeff Fredenburg (now VP of Engineering).|Short Read