Two papers authored by EECS researchers have been selected for IEEE Micro’s Top Picks from the 2015 Computer Architecture Conferences. Top Picks is an annual special edition of Micro magazine that acknowledges the most significant research papers from computer architecture conferences in the past year based on novelty and potential for long-term impact.
This year, Micro’s editors selected eleven papers for recognition. The two papers from Michigan introduced the Sirius personal digital assistant and the MBus bus for modular microcomputing systems.
Sirius Implications for Future Warehouse-Scale Computers
In “Sirius: An Open End-to-End Voice and Vision Personal Assistant and Its Implications for Future Warehouse Scale Computers,” the authors predict that demand is expected to grow significantly for cloud services which deliver sophisticated artificial intelligence in response to multimedia user queries. To study the what this future might look like and how cloud architectures should evolve in response, the researchers created Sirius, an open-source personal digital assistant.
The Sirius paper was authored by Michigan researchers Johann Hauswald (CSE PhD student; VP of Engineering, Clarity Lab, Inc), Michael A. Laurenzano PhD CSE, 2016; CSE Research Fellow; CTO, Clarity Lab, Inc), Yunqi Zhang (CSE PhD student), Cheng Li, Austin Rovinski (BSE EE, 2016; CSE PhD student), Arjun Khurana (CSE graduate student), Prof. Ronald G. Dreslinski, Prof. Trevor Mudge, Vinicius Petrucci, Prof. Lingjia Tang, and Prof. Jason Mars. It was presented at the 20th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS).
MBus: A System Integration Bus for the Modular Microscale Computing Class
In “MBus: An Ultra-Low Power Interconnect Bus for Next Generation Nanopower Systems,” the authors note that I/O has become the limiting factor in scaling down size and power toward the goal of invisible computing. Achieving this goal will require composing optimized and specialized – yet reusable – components with an interconnect that permits tiny, ultra-low-power systems. In contrast to today’s interconnects, which are limited by power-hungry pull-ups or high-overhead chip select lines, the authors present MBus, a four-pin, 22.6 pJ/bit/chip chip-to-chip interconnect made of two “shoot-through” rings. MBus facilitates ultra-low-power system operation by automatically power gating each chip in the system, easing the integration of active and inactive circuits. In addition, they introduce power-oblivious communication, which guarantees message reception even if the recipient is inactive. This disentangles power management from communication, greatly simplifying the creation of viable, modular, and heterogeneous systems that draw nanowatts.
The MBus paper was authored by Michigan researchers Pat Pannuto (CSE PhD student; Principal Systems Architect, Cibeworks), Prof. Yoonmyung Lee (PhD EE 2012; Asst. Prof., SungKyunKwan University), Ye-Sheng Kuo (PhD EE, 2015; CSE Research Fellow), ZhiYoong Foo (PhD EE 2013; CEO, Cubeworks), Benjamin Kempke (CSE PhD student), Gyouho Kim (PhD EE 2014; CTO, Cubeworks), Prof. Ronald G. Dreslinski, Prof. David Blaauw, and Prof. Prabal Dutta. It was presented at the 42nd International Symposium on Computer Architecture (ISCA).